Patents Around the Globe

A Sampling of Our Patents

The below list of patents apply to Deca’s products and technologies.  Additional patents may be pending and the list will be updated from time to time as new patents issue.  Patent numbers are included here to provide public notice of the patents. 

Patent NumberPatent TitleCountry of Issue
8799845ADAPTIVE PATTERNING FOR PANELIZED PACKAGINGU.S.
9887103SEMICONDUCTOR DEVICE AND METHOD OF ADAPTIVE PATTERNING FOR PANELIZED PACKAGINGU.S.
9978655SEMICONDUCTOR DEVICE AND METHOD OF ADAPTIVE PATTERNING FOR PANELIZED PACKAGING WITH DYNAMIC VIA CLIPU.S.
9818659MULTI-DIE PACKAGE COMPRISING UNIT SPECIFIC ALIGNMENT AND UNIT SPECIFIC ROUTINGU.S.
11791207UNIT SPECIFIC VARIABLE OR ADAPTIVE METAL FILL AND SYSTEM AND METHOD FOR THE SAMEU.S.
11887862SYSTEM AND METHOD FOR REDISTRIBUTION LAYER (RDL) REPAIRU.S.
8604600FULLY MOLDED FAN-OUT (DEVICE)U.S.
8535978DIE UP FULLY MOLDED FAN-OUT WAFER LEVEL PACKAGINGU.S.
10720417THERMALLY ENHANCED FULLY MOLDED FAN-OUT MODULEU.S.
9761571THERMALLY ENHANCED FULLY MOLDED FAN-OUT MODULEU.S.
10373902FULLY MOLDED MINIATURIZED SEMICONDUCTOR MODULEU.S.
95023973D INTERCONNECT COMPONENT FOR FULLY MOLDED PACKAGESU.S.
10672624METHOD OF MAKING FULLY MOLDED PERIPHERAL PACKAGE ON PACKAGE DEVICEU.S.
10818635FULLY MOLDED SEMICONDUCTOR PACKAGE FOR POWER DEVICES AND METHOD OF MAKING THE SAMEU.S.
11538759FULLY MOLDED BRIDGE INTERPOSER AND METHOD OF MAKING THE SAMEU.S.
11728248FULLY MOLDED SEMICONDUCTOR STRUCTURE WITH THROUGH SILICON VIA (TSV) VERTICAL INTERCONNECTSU.S.
11749534QUAD FLAT NO-LEAD (QFN) PACKAGE WITHOUT LEADFRAME AND DIRECT CONTACT INTERCONNECT BUILD-UP STRUCTURE AND METHOD FOR MAKING THE SAMEU.S.

Adaptive Patterning® Patents

ZL 201380033254.7INTEGRATED CIRCUIT PACKAGE AUTO-ROUTINGChina
ZL 201380064057.1SEMICONDUCTOR DEVICE AND METHOD OF ADAPTIVE PATTERNING FOR PANELIZED PACKAGINGChina
ZL 201180001658.9ADAPTIVE PATTERNING FOR PANELIZED PACKAGINGChina
ZL 201580033193.3SEMICONDUCTOR DEVICE AND METHOD OF ADAPTIVE PATTERNING FOR PANELIZED PACKAGING WITH DYNAMIC VIA CLIPChina
ZL 201580045860.XFRONT-SIDE PACKAGE LEVEL SERIALIZATION FOR PACKAGES COMPRISING UNIQUE IDENTIFIERSChina
ZL 201580062636.1AUTOMATED OPTICAL INSPECTION OF UNIT SPECIFIC PATTERNINGChina
ZL 201680059697.7MULTI-DIE PACKAGE COMPRISING ADAPTIVE ALIGNMENT AND ROUTINGChina
ZL 201780057483.0SEMICONDUCTOR DEVICE AND METHOD OF UNIT SPECIFIC PROGRESSIVE ALIGNMENTChina
252341AUTOMATED OPTICAL INSPECTION OF UNIT SPECIFIC PATTERNINGIsrael
6685301AUTOMATED OPTICAL INSPECTION OF UNIT SPECIFIC PATTERNINGJapan
6921257AUTOMATED OPTICAL INSPECTION OF UNIT SPECIFIC PATTERNINGJapan
10-1957851SEMICONDUCTOR DEVICE AND METHOD OF ADAPTIVE PATTERNING FOR PANELIZED PACKAGING WITH DYNAMIC VIA CLIPKorea
10-2081684FRONT-SIDE PACKAGE LEVEL SERIALIZATION FOR PACKAGES COMPRISING UNIQUE IDENTIFIERSKorea
10-2595447AUTOMATED OPTICAL INSPECTION OF UNIT SPECIFIC PATTERNINGKorea
10-2081682MULTI-DIE PACKAGE COMPRISING ADAPTIVE ALIGNMENT AND ROUTINGKorea
10-2197228SEMICONDUCTOR DEVICE AND METHOD OF UNIT SPECIFIC PROGRESSIVE ALIGNMENTKorea
11201503242WSEMICONDUCTOR DEVICE AND METHOD OF ADAPTIVE PATTERNING FOR PANELIZED PACKAGINGSingapore
182715ADAPTIVE PATTERNING FOR PANELIZED PACKAGINGSingapore
1674635MULTI-DIE PACKAGE COMPRISING ADAPTIVE ALIGNMENT AND ROUTINGTaiwan
I758327SEMICONDUCTOR DEVICE AND METHOD OF UNIT SPECIFIC PROGRESSIVE ALIGNMENTTaiwan
8799845ADAPTIVE PATTERNING FOR PANELIZED PACKAGINGU.S.
9040316SEMICONDUCTOR DEVICE AND METHOD OF ADAPTIVE PATTERNING FOR PANELIZED PACKAGING WITH DYNAMIC VIA CLIPU.S.
9520331ADAPTIVE PATTERNING FOR PANELIZED PACKAGINGU.S.
9418905ADAPTIVE PATTERNING FOR PANELIZED PACKAGINGU.S.
8826221ADAPTIVE PATTERNING FOR PANELIZED PACKAGINGU.S.
8656333INTEGRATED CIRCUIT PACKAGE AUTO-ROUTINGU.S.
9196509SEMICONDUCTOR DEVICE AND METHOD OF ADAPTIVE PATTERNING FOR PANELIZED PACKAGINGU.S.
9887103SEMICONDUCTOR DEVICE AND METHOD OF ADAPTIVE PATTERNING FOR PANELIZED PACKAGINGU.S.
9397069SEMICONDUCTOR DEVICE AND METHOD OF ADAPTIVE PATTERNING FOR PANELIZED PACKAGING WITH DYNAMIC VIA CLIPU.S.
9978655SEMICONDUCTOR DEVICE AND METHOD OF ADAPTIVE PATTERNING FOR PANELIZED PACKAGING WITH DYNAMIC VIA CLIPU.S.
9520364FRONT SIDE PACKAGE-LEVEL SERIALIZATION FOR PACKAGES COMPRISING UNIQUE IDENTIFIERSU.S.
10056304AUTOMATED OPTICAL INSPECTION OF ADAPTIVE PATTERNINGU.S.
9401313AUTOMATED OPTICAL INSPECTION OF UNIT SPECIFIC PATTERNINGU.S.
9818659MULTI-DIE PACKAGE COMPRISING UNIT SPECIFIC ALIGNMENT AND UNIT SPECIFIC ROUTINGU.S.
10573601SEMICONDUCTOR DEVICE AND METHOD OF UNIT SPECIFIC PROGRESSIVE ALIGNMENTU.S.
10157803SEMICONDUCTOR DEVICE AND METHOD OF UNIT SPECIFIC PROGRESSIVE ALIGNMENTU.S.
11791207UNIT SPECIFIC VARIABLE OR ADAPTIVE METAL FILL AND SYSTEM AND METHOD FOR THE SAMEU.S.
11887862SYSTEM AND METHOD FOR REDISTRIBUTION LAYER (RDL) REPAIRU.S.

M-Series® Patents

ZL 201180008457.XFAN OUT WAFER LEVEL PACKAGE WITH TRANSFERRED DIELECTRIC China
ZL 201280069322.0SEMICONDUCTOR DEVICE AND METHOD COMPRISING THICKENED REDISTRIBUTION
LAYERS
China
ZL 201210311793.XFULLY MOLDED FAN-OUTChina
ZL 201480008489.5 SEMICONDUCTOR DEVICE AND METHOD OF LAND GRID ARRAY PACKAGING WITH BUSSING LINESChina
ZL 201680054403.1THERMALLY ENHANCED FULLY MOLDED FAN-OUT MODULEChina
ZL 2016800678271FULLY MOLDED MINIATURIZED SEMICONDUCTOR MODULEChina
10-2434823SEMICONDUCTOR DEVICE AND METHOD COMPRISING THICKENED REDISTRIBUTION LAYERSKorea
10-2114563THERMALLY ENHAMCED FULLY MOLDED FAN-OUT MODULEKorea
10-2127774FULLY MOLDED MINIATURIZED SEMICONDUCTOR MODULEKorea
10201503498XPANELIZED PACKAGING WITH TRANSFERRED DIELECTRICSingapore
11201404309VDIE UP FULLY MOLDED FAN-OUT WAFER LEVEL PACKAGINGSingapore
11201404307TFULLY MOLDED FAN-OUTSingapore
11201504442YSEMICONDUCTOR DEVICE AND METHOD OF LAND GRID ARRAY PACKAGING WITH BUSSING LINESSingapore
I643271THERMALLY ENHANCED FULLY MOLDED FAN-OUT MODULETaiwan
I716732THERMALLY ENHANCED FULLY MOLDED FAN-OUT MODULETaiwan
1674658FULLY MOLDED MINIATURIZED SEMICONDUCTOR MODULETaiwan
8604600FULLY MOLDED FAN-OUT (DEVICE)U.S.
9269622SEMICONDUCTOR DEVICE AND METHOD OF LAND GRID ARRAY PACKAGING WITH BUSSING LINESU.S.
8535978DIE UP FULLY MOLDED FAN-OUT WAFER LEVEL PACKAGINGU.S.
8922021DIE UP FULLY MOLDED FAN-OUT WAFER LEVEL PACKAGINGU.S.
9337086DIE UP FULLY MOLDED FAN-OUT WAFER LEVEL PACKAGINGU.S.
9177926SEMICONDUCTOR DEVICE AND METHOD COMPRISING THICKENED REDISTRIBUTION LAYERSU.S.
9576919SEMICONDUCTOR DEVICE AND METHOD COMPRISING REDISTRIBUTION LAYERS U.S.
9754835SEMICONDUCTOR DEVICE AND METHOD COMPRISING REDISTRIBUTION LAYERSU.S.
10373870SEMICONDUCTOR DEVICE AND METHOD OF PACKAGINGU.S.
8835230FULLY MOLDED FAN-OUT (METHOD)U.S.
10720417THERMALLY ENHANCED FULLY MOLDED FAN-OUT MODULEU.S.
9761571THERMALLY ENHANCED FULLY MOLDED FAN-OUT MODULEU.S.
10373902FULLY MOLDED MINIATURIZED SEMICONDUCTOR MODULEU.S.
9831170FULLY MOLDED MINIATURIZED SEMICONDUCTOR MODULEU.S.
ZL 201680003401.X3D INTERCONNECT COMPONENT FOR FULLY MOLDED PACKAGESChina
ZL 201680067520.1FULLY MOLDED PERIPHERAL PACKAGE ON PACKAGE DEVICEChina
ZL 201680067826.7FULLY MOLDED PERIPHERAL PACKAGE ON PACKAGE DEVICEChina
10-24473193D INTERCONNECT COMPONENT FOR FULLY MOLDED PACKAGESKorea
10-2164011FULLY MOLDED PERIPHERAL PACKAGE ON PACKAGE DEVICEKorea
10-2164012FULLY MOLDED PERIPHERAL PACKAGE ON PACKAGE DEVICEKorea
10-2487891FULLY MOLDED SEMICONDUCTOR PACKAGE FOR POWER DEVICES AND METHOD OF MAKING THE SAMEKorea
I6900443D INTERCONNECT COMPONENT FOR FULLY MOLDED PACKAGESTaiwan
I771582FULLY MOLDED SEMICONDUCTOR PACKAGE FOR POWER DEVICES AND METHOD OF MAKING THE SAMETaiwan
9,502,3973D INTERCONNECT COMPONENT FOR FULLY MOLDED PACKAGESU.S.
10,672,624METHOD OF MAKING FULLY MOLDED PERIPHERAL PACKAGE ON PACKAGE DEVICEU.S.
9,613,830FULLY MOLDED PERIPHERAL PACKAGE ON PACKAGE DEVICEU.S.
10,050,004FULLY MOLDED PERIPHERAL PACKAGE ON PACKAGE DEVICEU.S.
10,818,635FULLY MOLDED SEMICONDUCTOR PACKAGE FOR POWER DEVICES AND METHOD OF MAKING THE SAMEU.S.
11056453STACKABLE FULLY MOLDED SEMICONDUCTOR STRUCTURE WITH VERTICAL INTERCONNECTSU.S.
11538759FULLY MOLDED BRIDGE INTERPOSER AND METHOD OF MAKING THE SAMEU.S.
11444051FULLY MOLDED SEMICONDUCTOR STRUCTURE WITH FACE MOUNTED PASSIVES AND METHOD OF MAKING THE SAMEU.S.
11664321MULTI-STEP HIGH ASPECT RATIO VERTICAL INTERCONNECT AND METHOD OF MAKING THE SAMEU.S.
11616003STACKABLE FULLY MOLDED SEMICONDUCTOR STRUCTURE WITH THROUGH SILICON VIA (TSV) VERTICAL INTERCONNECTSU.S.
11728248FULLY MOLDED SEMICONDUCTOR STRUCTURE WITH THROUGH SILICON VIA (TSV) VERTICAL INTERCONNECTSU.S.
11749534QUAD FLAT NO-LEAD (QFN) PACKAGE WITHOUT LEADFRAME AND DIRECT CONTACT INTERCONNECT BUILD-UP STRUCTURE AND METHOD FOR MAKING THE SAMEU.S.

Manufacturing Patents

ZL 201480051294.9TWO STEP METHOD OF RAPID CURING A SEMICONDUCTOR POLYMER LAYERChina
ZL 201580069079.6METHOD OF MARKING A SEMICONDUCTOR PACKAGEChina
ZL 201680051785.2SEMICONDUCTOR DEVICE PROCESSING METHOD FOR MATERIAL REMOVALChina
6902017SEMICONDUCTOR DEVICE PROCESSING METHOD FOR MATERIAL REMOVALJapan
7104826SEMICONDUCTOR DEVICE PROCESSING METHOD FOR MATERIAL REMOVALJapan
10-2197220TWO STEP METHOD OF RAPID CURING A SEMICONDUCTOR POLYMER LAYERKorea
10-2506703METHOD OF MARKING A SEMICONDUCTOR PACKAGEKorea
10-2081683SEMICONDUCTOR DEVICE PROCESSING METHOD FOR MATERIAL REMOVALKorea
I664708METHOD OF MARKING A SEMICONDUCTOR PACKAGETaiwan
I692023SEMICONDUCTOR DEVICE PROCESSING METHOD FOR MATERIAL REMOVALTaiwan
10204803TWO STEP METHOD OF RAPID CURING A SEMICONDUCTOR POLYMER LAYERU.S.
9159547TWO STEP METHOD OF RAPID CURING A SEMICONDUCTOR POLYMER LAYERU.S.
10373913METHOD OF MARKING A SEMICONDUCTOR PACKAGEU.S.
9613912METHOD OF MARKING A SEMICONDUCTOR PACKAGEU.S.
10600652SEMICONDUCTOR DEVICE PROCESSING METHOD FOR MATERIAL REMOVALU.S.
9640495SEMICONDUCTOR DEVICE PROCESSING METHOD FOR MATERIAL REMOVAL U.S.
Click to access the login or register cheese
x  Powerful Protection for WordPress, from Shield Security
This Site Is Protected By
ShieldPRO